A Real-time SAR Echo Simulator Based on FPGA and Parallel Computing
Xu Yinhui, Zeng Dazhi, Yan Tao, Xu Xiaoheng
Abstract
This paper designs and implements a SAR (Synthetic Aperture Radar) real-time echo simulator based on multi-FPGA parallel computing. The one-dimensional frequency-domain Fourier transform algorithm is used in the simulator, and the echo signal model and the rapid calculation algorithm of impulse response function are introduced. The pipeline compute structure, multichannel parallel computing and procedure flow design are the key technologies of the simulator, which are also presented in details. And finally, the validity and correctness of the SAR echo simulator are verified through the imaging results of the point-array target and the nature scene target.
DOI:
http://doi.org/10.12928/telkomnika.v13i3.1972
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TELKOMNIKA Telecommunication, Computing, Electronics and Control ISSN: 1693-6930, e-ISSN: 2302-9293Universitas Ahmad Dahlan , 4th Campus Jl. Ringroad Selatan, Kragilan, Tamanan, Banguntapan, Bantul, Yogyakarta, Indonesia 55191 Phone: +62 (274) 563515, 511830, 379418, 371120 Fax: +62 274 564604
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