Threshold Voltage Roll-off by Structural Parameters for Sub-10 nm Asymmetric Double Gate MOSFET

Abstract

This study is to analyze threshold voltage roll-off according to structural parameters of sub-10 nm asymmetric double gate MOSFET. In case of sub-10nm channel length, because of short channel effects resulting from the rapid increase of tunneling current, even asymmetric double gate (DG) MOSFET, which has been developed for reducing short channel effects, will increase threshold voltage roll-off, and this is an obstacle against the miniaturization of asymmetric DGMOSFET. Especially, since asymmetric DGMOSFET can be produced differently in top and bottom oxide thickness, top/bottom oxide thickness will affect the threshold voltage roll-off. To analyze this, thermal emission current and tunneling current model have been calculated, and threshold voltage roll-off in accordance with the reduction of channel length has been analyzed by using channel thickness and top/bottom oxide thickness as parameters. As a result, it is found that, in short channel asymmetric double gate MOSFET, threshold voltage roll-off is changed greatly according to top/bottom gate oxide thickness, and that threshold voltage roll-off, in particular, is generated more greatly according to silicon thickness. In addition, it is found that top and bottom oxide thickness have a relation of inverse proportion mutually for maintaining identical threshold voltage